IBM has revolutionized processor technology by introducing the world’s first dual-instruction-set architecture (Dual-ISA) core

IBM made a historic breakthrough in computing technology on the eve of the announcement, unveiling the development of a next-generation processor with a unique feature — a dual instruction set architecture (ISA) within a single core. This innovation opens unprecedented possibilities for simultaneously running software designed for both IBM’s traditional Z architecture and the widely used Arm architecture.

Arm and Z Integration: A New Era of Enterprise Computing

According to Christian Zollin, IBM’s lead engineer and head of the Z processor division, this technological achievement, presented at the prestigious Hot Chips 2026 conference, will be the world’s first Dual-ISA core implementation in IBM Z and LinuxOne mainframe processors. The key aspect of this development is not placing two separate types of cores on a single chip, as in hybrid solutions from other vendors, but the true integration of Arm ISA architecture directly into the foundation of mainframe cores. This approach will allow IBM to effectively combine the broad and flexible Arm software ecosystem with the rich advantages of mainframes: unmatched scalability, exceptional performance, high availability, and uncompromising security.

Today, IBM offers two powerful solutions for the enterprise segment: IBM Z, the standard for traditional enterprise computing, and LinuxOne, a specialized server for enterprises running Linux. Together, these platforms account for an impressive 68% of all global production IT workloads, underscoring the trust of the most demanding customers. It is no surprise that 77 of the world’s 100 largest banks already actively use IBM Z and LinuxOne to ensure stability and efficiency in their operations.

Innovations in Architecture and Performance

Alongside the Dual-ISA announcement, IBM introduced an 11-core next-generation IBM Z processor, embodying the highest standards of performance and reliability. These future processor cores will operate at frequencies above 5.7 GHz and will be manufactured using an advanced 2-nanometer process. An important innovation is the ability of these cores to handle both native z/Architecture and AArch64 within the same physical core. The chip architecture features a multiprocessor structure (SMP Fabric) on both the top and bottom. On one side are PCIe and Coupling interfaces, and on the other is the memory controller, ensuring optimal data access.

In addition, the new processor boasts a massive 36 MB L2 cache integrated with virtual L3 and L4 caches. The virtual L3 cache reaches 432 MB, while the L4 cache объединates the caches of all cores, providing a total capacity of up to 3.5 GB. This configuration minimizes data access latency, which is critically important for enterprise workloads, including transaction processing and database operations, where speed and efficiency are paramount.

Broad Opportunities for Developers and Business

The new processor will also include advanced accelerator IP blocks. These include a dedicated embedded DPU (Data Processing Unit) to accelerate input/output operations, as well as specialized accelerators for artificial intelligence (AI), data compression, cryptographic operations, and sorting. All of these powerful capabilities will be available for Arm-based processors, opening new horizons for developers. Customers will be able to run a wide range of software from the Arm ecosystem directly alongside core Z enterprise workloads, creating synergy and optimizing resource usage.

The Z system has traditionally supported two levels of virtualization. Most large enterprises use the IBM z/OS operating system for their key workloads. However, running Linux-based workloads in parallel is equally common, often using second-level hypervisors such as KVM and OpenShift. The future IBM Z chip will significantly expand these capabilities, allowing KVM virtual machines to run on both traditional S390X/Z architectures and Arm64 architectures. This means companies will be able to flexibly distribute their workloads across different architectures, optimizing performance and costs.

In this way, IBM is creating a unified platform that combines the power of Linux and Arm for parallel operation with the most important enterprise workloads traditionally run on Z OS. At this time, the company has no plans to support other operating systems on this platform, but it is actively working with customers and partners from the Arm ecosystem to explore new potential uses for this innovative chip.

Although it will still be several years before the next generation of IBM Z chips arrives, the company has already begun active development, demonstrating its commitment to staying at the forefront of technological innovation. This move is evidence of IBM’s strategic vision for the future of enterprise computing, where flexibility, performance, and versatility are becoming key requirements.